Low-Power High-Speed ADCs for Nanometer CMOS Integration (Analog Circuits and Signal Processing)
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ADC low-power high-speed nanometer CMOS integration is on the design and implementation of the ADC in nanometer CMOS processes that offer low power consumption for a given speed and resolution of previous models, thanks to the circuit and architectural innovations can enjoy the unique characteristics of nanometer CMOS process. Locked loop (PLL) clock multiplier is also designed with new circuit techniques and successfully tested.
1) A 1.2 V 52mW, 210m / s, two 10-bit
List Price: $ 149.00
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